Flip chip assembly techniques bring a wide range of benefits: A reduced parasitic interconnection between the semiconductor die and package. Provides a high final assembly integrity density. Minimize the interconnection length, providing better electrical performances, especially for high-speed signals. Reduce device size and weight,…, etc.
Space Symposium Euroavia | March, 6th, 2018 Space Symposium Euroavia, Seville 2018 ( see details here http://spacesymposium2018.euroavia.eu/), with two main activities: Whorkshop: “EEE Components a challenge for future space mission success” Tuesday, March, 6th. 9:00 to 11:00h. Speaker: Gonzalo Fernández (Alter Technology) Technical visit to the laboratories in the facilities of Alter Technology, located within the PCT Cartuja.
The Single event effects is becoming more and more important due to the devices technology evolution, the increase demand of COTS use (and other non characterized devices against radiation), and the radiation requirements request by new missions and applications. In this paper we present an overview of the situation and we propose a test strategy to obtain the needed information about SEE behavior to determine to use a device in a certain application. It includes the assessment of devices that are in the development phase, those in which their technologies and design information are available, and components for which the only available information is the limited one offered by the component manufactre to users. In all cases, we propose a flow of operations and tasks to gather SEE information to decide on its use.