RELIFING

By
Alejandro Castillo Pérez

The relifing process consists in the evaluation of the electronic component reliability when stored for a longer period.

Storage of EEE part represents a key process in space electronics activity, In order to cope with projects time schedule on one hand and with economical procurement constraints on the other hand, parts are often to be stored for quite a long time. Obsolescence issues could require building strategic stock in order to be able to manufacture equipments over a period longer than the product life cycle. Many other factors can lead to the need of using parts that have been stored over a long period,  so the aim of this test is to consolidate such components and to validate their usability.Relifing electronics components

EEE components can undergo a certain degree of degradation during storage, caused mainly by unfavourable storing conditions or by improper storage or handling. The relifing process is aimed at detecting any latent or patent degradation in the product performance that could directly affect the system performance or pose a specific long-term threat.

The commonly used in Europe ESCC standard ECSS-Q-ST-60-14C specifies the relifing requirements and the activities to be performed on products that have been stored for a long time. The test sequence defined in the standard has been optimized in order to obtain maximum confidence in the test results with a limited set of inspections. It can be summarized as follows:

  1. External visual inspection: to detect (under magnification) signs of corrosion, degradation of the sealing material or other potential defects
  2. Electrical measurements: to estimate the presence or absence of wearout caused by storage.
  3. Seal test: to verify the hermeticity of the components
  4. Any other specific test (for example the solderability test): to further verify the normal functioning of the components.

By its nature, relifing is a non-destructive set of inspections (except for special tests, such as solderability, performed on a limited number of samples) which allows to validate the usability of components when the time period from the manufacturing date (indicated by the date-code) to the PCB assembly date exceeds a certain number of years.

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