Degolding and Retinning Processes On Leadless SMD Packaged Devices

The procurement, evaluation, screening and lot acceptance of RF devices in leadless SMD packages to be used in spacecraft applications show unexpected difficulties whenever degolding or retinning processes are required. This is associated to the induced lack of coplanarity in the contacts after those.

“Influence Of Non-Coplanarity Of Contacts In The RF Electrical Measurements.”

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Space product assurance (ECSS-Q-ST-60-13C)   requires pure tin contacts to be retinned. Additionally, the assem bly processes selected by the OEMs requires gold finish to be removed and replaced by tin-lead alloys.

ECSS-Q-ST-60-13C

External views of the sample

degolding

This task has been systematically considered simple but hides a big problem: it is not possible to make the pads perfectly flat and co-planar post dipping. This is a solder dip process so that this is a result of the surface tension of the solder and the geometry of the pad.

External views

  • De-golded and pretinned sample
  • Orientation Pin Marker
  • Copper Via Metallizations

External views

  • De-golded and pretinned sample
  • Orientation Pin Marker
  • Copper Multilayer
  • Stripline
  • Contacts

External views

  • Orientation Pin Marker
  • Ports
  • GND
  • Unbalanced

Typically, after degolding or retinning processes, solder thickness not to exceed 0.002 inches, so maximum non-planarity would as small as such 0.002 inches. However, this small non-planarity in the pads of a component produces poor or inexistent electrical contact between the test fixture and the device.

This results in parasitic effects that distort the electrical measurement at microwave frequencies. When a small air gap is present between the signal pad and the test fixture, its effect may be modeled mainly as a series capacitance and a resistance.

Its effect may behave as a high-pass filter with uncontrolled cut off frequency, ant it can also produce reflection of the input signal due to mismatched input impedance.

The same can occur in a ground pad that affects the grounding of the device converting it in a floating ground or reference.

degolding + pretinning processes

Results of a device that has undergone the degolding + pretinning processes and failed the subsequent electrical measurement.

There are methods for levelling the solder after, but screening activities for space applications require extreme care during the manipulation of the EEE parts to be assembled on a spacecraft, and those all carry a high risk of damage to the package.

Alter Technology has defined a procedure for the degolding / retinning processes by optimizing the parameters involved for each component (time and temperature in solder baths, for example), defining cleaning actions on contacts before and after and using a specific method of evening without damaging the devices.

A customized test fixture specifically designed for the electrical measurements is also developed, as necessary. Both together minimize or avoid the negative effects described above and avoid false rejection of functional parts.

Degolding and Retinning Procesesses on leadless

Results of a device that has undergone the degolding + pretinning processes and passed the subsequent electrical measurement. These are similar to which can be obtained on a sample not subject to any previous process.

At Alter Technology, we can perform:

  • Procurement Management EEE Parts: Our commercial and technical expertise and experience allows us to recommend, select and supply components from good manufacturing sources (avoiding counterfeits).
  • Evaluation:  The reliability of the components used in a spacecraft is a determinating factor for their operation and performance throughout the mission life. Only the most advanced techniques are able to provide the depth and accuracy in the inspections required by current state of the art microelectronics.
  • Screening : Environmental-stress screening (ESS) is an essential step in the design cycle of electronic systems, particularly as these systems shrink in size and increase in complexity

Authors:  Dimas J. Morilla, Aintzane LujambioDavid Nuñez Teruel, Manuel Domínguez.

This post is also available in: Spanish